The MC68HC908AS60A are member of the
high-performance M68HC08 Family of 8-bit microcontroller
units (MCUs). The M68HC08 Family is based on the customer-specified
integrated circuit (CSIC) design strategy. All MCUs in the family use the
enhanced M68HC08 central processor unit (CPU08) and are available
with a variety of modules, memory sizes and types, and package types.
These parts are designed to emulate the MC68HC08ASxx and
MC68HC08AZxx automotive families and may offer extra features which
are not available on those devices. It is the user's responsibility to ensure
compatibility between the features used on the MC68HC908AS60A and
MC68HC908AZ60A and those which are available on the device which
will ultimately be used in the application.

Features of the MC68HC908AS60A and MC68HC908AZ60A include:
* High-Performance M68HC08 Architecture
* Fully Upward-Compatible Object Code with M6805, M146805,and M68HC05 Families
* 8.4 MHz Internal Bus Frequency
* 60 Kbytes of FLASH Electrically Erasable Read-Only Memory (FLASH)
* FLASH Data Security
* 1 Kbyte of On-Chip Electrically Erasable Programmable Read-Only Memory with Security Option (EEPROM)
* 2 Kbyte of On-Chip RAM
* Clock Generator Module (CGM)
* Serial Peripheral Interface Module (SPI)
* Serial Communications Interface Module (SCI)
* 8-Bit, 15-Channel Analog-to-Digital Converter (ADC-15)
* 16-Bit, 6-Channel Timer Interface Module (TIMA-6)
* Programmable Interrupt Timer (PIT)
* System Protection Features
- Computer Operating Properly (COP) with Optional Reset
- Low-Voltage Detection with Optional Reset
- Illegal Opcode Detection with Optional Reset
- Illegal Address Detection with Optional Reset
* Low-Power Design (Fully Static with Stop and Wait Modes)
* Master Reset Pin and Power-On Reset
* 5-Bit Keyboard Interrupt Module (64-Pin QFP only)
* SAE J1850 Byte Data Link Controller Digital Module (AS only)

Features of the CPU08 include:
* Enhanced HC05 Programming Model
* Extensive Loop Control Functions
* 16 Addressing Modes (Eight More Than the HC05)
* 16-Bit Index Register and Stack Pointer
* Memory-to-Memory Data Transfers
* Fast 8 — 8 Multiply Instruction
* Fast 16/8 Divide Instruction
* Binary-Coded Decimal (BCD) Instructions
* Optimization for Controller Applications
* C Language Support



The 512 bytes of EEPROM are divided into four 128-byte blocks. Each
of these blocks can be separately protected by EEBPx bit. Any attempt
to program or erase memory locations within the protected block will not
allow the program/erase voltage to be applied to the array. Table 1
shows the address ranges within the blocks.
If EEBPx bit is set, that corresponding address block is protected. These
bits are effective after a reset or a read to EENVR1 register. The block
protect configuration can be modified by erasing/programming the
corresponding bits in the EENVR1 register and then reading the
EENVR1 register.
Block Number (EEBPx) Address Range
EEBP0 $0800-$087F
EEBP1 $0880-$08FF
EEBP2 $0900-$097F
EEBP3 $0980-$09FF

EENVR2 register.
Block Number (EEBPx) Address Range
EEBP0 $0600-$067F
EEBP1 $0680-$06FF
EEBP2 $0700-$077F
EEBP3 $0780-$07FF

EEPRTCT - EEPROM Protection
This one-time programmable bit can be used to protect 16 bytes
$8F0-$8FF from being erased or programmed.
1 = EEPROM protection disabled
0 = EEPROM protection enabled

The new configuration will take affect after a system reset.

EENVR1,EENVR2 default state: 10000 (bin)